VLSI Signal Processing
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| order | Lecture | HomeWork |
|---|---|---|
| 1 | [24S-Introduction] | Homework 1 [1] [2] [3] |
| 2 | [Enery-Delay-Models] | |
| 3 | [Circuit-Optimization] | |
| 4 | [Architectural-Techniques(annotated)] | Homework 2 [1] |
| 5 | [Architectural-Flexibility(annotated)] | |
| 6 | [DSP-Arithmetic(annotated)] | |
| 7 | [CORDIC-Div-Sqrt] | |
| 8 | [Digital-Filters] | Midterm [1] [2] |
| 9 | 1-[Brief-intro-to-CGRAs] 2-[Compute-with-Chiplets_DMarkovic-UCLA] |
|
| 10 | [CADA] | |
| 11 | [DFG-Model] | |
| 12 | [In-class-presentation_CGRAs] | |
| 13 | [SDR-Optimization] | |
| 14 | [AI-ML-Hw] | |
| 15 | [FFT-Optimization] | |
| 16 | [FPGA-Arch] | |
| 17 | [S24-Project-Guide] | Final [1] [2] [3] [Architecture-20Design-20Essentials] |