EE215D Analog Microsystem(A/D)

Table of contents

1. Table of Contents

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Table of Contents

• CHAPTER 1: INTRODUCTION TO DATA CONVERSION AND PROCESSING - Page 1

• CHAPTER 2: BASIC SAMPLING CIRCUITS

  • 2.1 General Considerations - Page 7
  • 2.2 Performance Metrics - Page 11
  • 2.3 Sampling Switches - Page 13
    • 2.3.1 MOS Switches - Page 14
    • 2.3.2 Diode Switches - Page 19
    • 2.3.3 Comparison of MOS and Diode Switches - Page 23
    • 2.3.4 Improvements in MOS Switch Performance - Page 24
  • References - Page 27

• CHAPTER 3: SAMPLE-AND-HOLD ARCHITECTURES

  • 3.1 Conventional Open-Loop Architecture - Page 29
  • 3.2 Conventional Closed-Loop Architecture - Page 31

  • 3.3 Open-Loop Architecture with Miller Capacitance - Page 33

  • 3.4 Multiplexed-Input Architectures - Page 35

  • 3.5 Recycling Architecture - Page 39

  • 3.6 Switched-Capacitor Architecture - Page 40

  • 3.7 Current-Mode Architecture - Page 42

  • References - Page 43

• CHAPTER 4: BASIC PRINCIPLES OF DIGITAL-TO-ANALOG CONVERSION - Page 45

  • 4.1 General Considerations - Page 45
  • 4.2 Performance Metrics - Page 47
  • 4.3 Reference Multiplication and Division - Page 49
    • 4.3.1 Voltage Division - Page 50
    • 4.3.2 Current Division - Page 55
    • 4.3.3 Charge Division - Page 63
  • 4.4 Switching and Logical Functions in DACs - Page 70
    • 4.4.1 Switching Functions in Resistor-Ladder DACs - Page 70
    • 4.4.2 Switching Functions in Current-Steering DACs - Page 72
    • 4.4.3 Switching Functions in Capacitor DACs - Page 74
    • 4.4.4 Binary-to-Thermometer Code Conversion - Page 76
  • References - Page 77

• CHAPTER 5: DIGITAL-TO-ANALOG CONVERTER ARCHITECTURES - Page 79

  • 5.1 Resistor-Ladder DAC Architectures - Page 79
    • 5.1.1 Ladder Architecture with Switched Subdivider - Page 79
    • 5.1.2 Intermeshed Ladder Architectures - Page 82
  • 5.2 Current-Steering Architectures - Page 84
    • 5.2.1 R-2R-Network Based Architectures - Page 84
    • 5.2.2 Segmented Architectures - Page 90
  • References - Page 94

• CHAPTER 6: ANALOG-TO-DIGITAL CONVERTER ARCHITECTURES - Page 96

  • 6.1 General Considerations - Page 96
  • 6.2 Performance Metrics - Page 99
  • 6.3 Flash Architectures - Page 101
    • 6.3.1 Reference Ladder DC and AC Bowing - Page 103
    • 6.3.2 Nonlinear Input Capacitance - Page 106
    • 6.3.3 Kickback Noise - Page 107
    • 6.3.4 Sparkles in Thermometer Code - Page 108
    • 6.3.5 Metastability - Page 110
    • 6.3.6 Slew-Dependent Sampling Point - Page 112
    • 6.3.7 Clock Jitter and Dispersion - Page 112
    • 6.3.8 Gray Encoding - Page 114
  • 6.4 Two-Step Architectures - Page 116
    • 6.4.1 Effect of Nonidealities - Page 121
    • 6.4.2 Two-Step Recycling Architecture - Page 124
    • 6.4.3 Two-Step Subranging Architecture - Page 125
  • 6.5 Interpolative and Folding Architectures - Page 126
    • 6.5.1 Interpolation - Page 127
    • 6.5.2 Folding Architectures - Page 132
    • 6.5.3 Folding with Interpolation - Page 136
  • 6.6 Pipelined Architectures - Page 140
  • 6.7 Successive Approximation Architectures - Page 143
  • 6.8 Interleaved Architectures - Page 147
  • References - Page 149

• CHAPTER 7: BUILDING BLOCKS OF DATA CONVERSION SYSTEMS - Page 153

  • 7.1 Amplifiers - Page 153
    • 7.1.1 Open-Loop Amplifiers - Page 153
    • 7.1.2 Closed-Loop Amplifiers - Page 160
    • 7.1.3 Operational Amplifiers - Page 164
    • 7.1.4 Gain Boosting Techniques - Page 171
    • 7.1.5 Common-Mode Feedback - Page 172
  • 7.2 Comparators - Page 177
    • 7.2.1 Bipolar Comparators - Page 181
    • 7.2.2 CMOS Comparators - Page 188
    • 7.2.3 BiCMOS Comparators - Page 191
  • References - Page 195

• CHAPTER 8: PRECISION TECHNIQUES - Page 198

  • 8.1 Comparator Offset Cancellation - Page 198
    • 8.1.1 Input Offset Storage - Page 199
    • 8.1.2 Output Offset Storage - Page 201
    • 8.1.3 Multistage Offset Storage - Page 202
    • 8.1.4 Comparators Using Offset-Cancelled Latches - Page 206

  • 8.2 Op Amp Offset Cancellation - Page 208

  • 8.3 Calibration Techniques - Page 211
    • 8.3.1 DAC Calibration Techniques - Page 211
    • 8.3.2 ADC Calibration Techniques - Page 218

  • 8.4 Range Overlap and Digital Correction - Page 224

  • References - Page 229
• CHAPTER 9: TESTING AND CHARACTERIZATION - Page 232
  • 9.1 General Considerations - Page 232
  • 9.2 Sampling Circuits - Page 234
  • 9.3 D/A Converters - Page 239
  • 9.4 A/D Converters - Page 239
    • 9.4.1 Static Testing - Page 239
    • 9.4.2 Dynamic Testing - Page 241
• INDEX - Page 252