EE215C Analysis and Design of RF Circuits and Systems

Table of contents

1. EE215C Analysis and Design of RF Circuits and Systems
   1. CHAPTER 1: INTRODUCTION TO RF AND WIRELESS TECHNOLOGY
   2. CHAPTER 2: BASIC CONCEPTS IN RF DESIGN
   3. CHAPTER 3: COMMUNICATION CONCEPTS
   4. CHAPTER 4: TRANSCEIVER ARCHITECTURES
   5. CHAPTER 5: LOW-NOISE AMPLIFIERS
   6. CHAPTER 6: MIXERS
   7. CHAPTER 7: PASSIVE DEVICES
   8. CHAPTER 8: OSCILLATORS
   9. CHAPTER 9: PHASE-LOCKED LOOPS
   10. CHAPTER 10: INTEGER-N FREQUENCY SYNTHESIZERS
   11. CHAPTER 11: FRACTIONAL-N SYNTHESIZERS
   12. CHAPTER 12: POWER AMPLIFIERS
   13. CHAPTER 13: TRANSCEIVER DESIGN EXAMPLE
   14. INDEX

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EE215C Analysis and Design of RF Circuits and Systems

CHAPTER 1: INTRODUCTION TO RF AND WIRELESS TECHNOLOGY

• 1. A Wireless World
• 1.1 RF Design Is Challenging
• 1.2 The Big Picture
• References

CHAPTER 2: BASIC CONCEPTS IN RF DESIGN

• 2.1 General Considerations

  • 2.1.1 Units in RF Design
  • 2.1.2 Time Variance
  • 2.1.3 Nonlinearity

• 2.2 Effects of Nonlinearity

  • 2.2.1 Harmonic Distortion
  • 2.2.2 Gain Compression
  • 2.2.3 Cross Modulation
  • 2.2.4 Intermodulation
  • 2.2.5 Cascaded Nonlinear Stages
  • 2.2.6 AM/PM Conversion

• 2.3 Noise

  • 2.3.1 Noise as a Random Process

  • 2.3.2 Noise Spectrum

  • 2.3.3 Effect of Transfer Function on Noise

  • 2.3.4 Device Noise

  • 2.3.5 Representation of Noise in Circuits
• 2.4 Sensitivity and Dynamic Range
  • 2.4.1 Sensitivity
  • 2.4.2 Dynamic Range
• 2.5 Passive Impedance Transformation
  • 2.5.1 Quality Factor
  • 2.5.2 Series-to-Parallel Conversion
  • 2.5.3 Basic Matching Networks
  • 2.5.4 Loss in Matching Networks
• 2.6 Scattering Parameters
• 2.7 Analysis of Nonlinear Dynamic Systems
  • 2.7.1 Basic Considerations
• 2.8 Volterra Series
  • 2.8.1 Method of Nonlinear Currents
• References
• Problems

CHAPTER 3: COMMUNICATION CONCEPTS

• 3.1 General Considerations
• 3.2 Analog Modulation
  • 3.2.1 Amplitude Modulation
  • 3.2.2 Phase and Frequency Modulation
• 3.3 Digital Modulation
  • 3.3.1 Intersymbol Interference
  • 3.3.2 Signal Constellations
  • 3.3.3 Quadrature Modulation
  • 3.3.4 GMSK and GFSK Modulation
  • 3.3.5 Quadrature Amplitude Modulation
  • 3.3.6 Orthogonal Frequency Division Multiplexing
• 3.4 Spectral Regrowth
• 3.5 Mobile RF Communications
• 3.6 Multiple Access Techniques
  • 3.6.1 Time and Frequency Division Duplexing
  • 3.6.2 Frequency-Division Multiple Access
  • 3.6.3 Time-Division Multiple Access
  • 3.6.4 Code-Division Multiple Access
• 3.7 Wireless Standards
  • 3.7.1 GSM
  • 3.7.2 IS-95 CDMA
  • 3.7.3 Wideband CDMA
  • 3.7.4 Bluetooth
  • 3.7.5 IEEE802.11a/b/g
• 3.8 Appendix I: Differential Phase Shift Keying
• References
• Problems

CHAPTER 4: TRANSCEIVER ARCHITECTURES

• 4.1 General Considerations
• 4.2 Receiver Architectures
  • 4.2.1 Basic Heterodyne Receivers
  • 4.2.2 Modern Heterodyne Receivers
  • 4.2.3 Direct-Conversion Receivers
  • 4.2.4 Image-Reject Receivers
  • 4.2.5 Low-IF Receivers
• 4.3 Transmitter Architectures
  • 4.3.1 General Considerations
  • 4.3.2 Direct-Conversion Transmitters
  • 4.3.3 Modern Direct-Conversion Transmitters
  • 4.3.4 Heterodyne Transmitters
  • 4.3.5 Other TX Architectures
• 4.4 OOK Transceivers
• References
• Problems

CHAPTER 5: LOW-NOISE AMPLIFIERS

• 5.1 General Considerations
• 5.2 Problem of Input Matching
• 5.3 LNA Topologies
  • 5.3.1 Common-Source Stage with Inductive Load
  • 5.3.2 Common-Source Stage with Resistive Feedback
  • 5.3.3 Common-Gate Stage
  • 5.3.4 Cascode Cs Stage with Inductive Degeneration
  • 5.3.5 Variants of Common-Gate LNA
  • 5.3.6 Noise-Cancelling LNAs
  • 5.3.7 Reactance-Cancelling LNAs
• 5.4 Gain Switching
• 5.5 Band Switching
• 5.6 High-IP2 LNAs
  • 5.6.1 Differential LNAs
  • 5.6.2 Other Methods of IP2 Improvement
• 5.7 Nonlinearity Calculations
  • 5.7.1 Degenerated CS Stage
  • 5.7.2 Undegenerated CS Stage
  • 5.7.3 Differential and Quasi-Differential Pairs
  • 5.7.4 Degenerated Differential Pair
• References
• Problems

CHAPTER 6: MIXERS

• 6.1 General Considerations
  • 6.1.1 Performance Parameters
  • 6.1.2 Mixer Noise Figures
  • 6.1.3 Single-Balanced and Double-Balanced Mixers
• 6.2 Passive Downconversion Mixers
  • 6.2.1 Gain
  • 6.2.2 LO Self-Mixing
  • 6.2.3 Noise
  • 6.2.4 Input Impedance
  • 6.2.5 Current-Driven Passive Mixers
• 6.3 Active Downconversion Mixers
  • 6.3.1 Conversion Gain
  • 6.3.2 Noise in Active Mixers
  • 6.3.3 Linearity
• 6.4 Improved Mixer Topologies
  • 6.4.1 Active Mixers with Current-Source Helpers
  • 6.4.2 Active Mixers with Enhanced Transconductance
  • 6.4.3 Active Mixers with High IP2
  • 6.4.4 Active Mixers with Low Flicker Noise
• 6.5 Upconversion Mixers
  • 6.5.1 Performance Requirements
  • 6.5.2 Upconversion Mixer Topologies
• References
• Problems

CHAPTER 7: PASSIVE DEVICES

• 7.1 General Considerations
• 7.2 Inductors
  • 7.2.1 Basic Structure
  • 7.2.2 Inductor Geometries
  • 7.2.3 Inductance Equations
  • 7.2.4 Parasitic Capacitances
  • 7.2.5 Loss Mechanisms
  • 7.2.6 Inductor Modeling
  • 7.2.7 Alternative Inductor Structures
• 7.3 Transformer
  • 7.3.1 Transformer Structures
  • 7.3.2 Effect of Coupling Capacitance
  • 7.3.3 Transformer Modeling
• 7.4 Transmission Lines
  • 7.4.1 T-Line Structures
• 7.5 Varactors
• 7.6 Constant Capacitors
  • 7.6.1 MOS Capacitors
  • 7.6.2 Metal-Plate Capacitors
• References
• Problems

CHAPTER 8: OSCILLATORS

• 8.1 Performance Parameters
• 8.2 Basic Principles
  • 8.2.1 Feedback View of Oscillators
  • 8.2.2 One-Port View of Oscillators
• 8.3 Cross-Coupled Oscillator
• 8.4 Three-Point Oscillators
• 8.5 Voltage-Controlled Oscillators
  • 8.5.1 Tuning Range Limitations
  • 8.5.2 Effect of Varactor Q
• 8.6 LC VCOs with Wide Tuning Range
  • 8.6.1 VCOs with Continuous Tuning
  • 8.6.2 Amplitude Variation with Frequency Tuning
  • 8.6.3 Discrete Tuning
• 8.7 Phase Noise
  • 8.7.1 Basic Concepts
  • 8.7.2 Effect of Phase Noise
  • 8.7.3 Analysis of Phase Noise: Approach I
  • 8.7.4 Analysis of Phase Noise: Approach II
  • 8.7.5 Noise of Bias Current Source
  • 8.7.6 Figures of Merit of VCOs
• 8.8 Design Procedure
  • 8.8.1 Low-Noise VCOs
• 8.9 LO Interface
• 8.10 Mathematical Model of VCOs
• 8.11 Quadrature Oscillators
  • 8.11.1 Basic Concepts
  • 8.11.2 Properties of Coupled Oscillators
  • 8.11.3 Improved Quadrature Oscillators
• 8.12 Appendix I: Simulation of Quadrature Oscillators
• References
• Problems

CHAPTER 9: PHASE-LOCKED LOOPS

• 9.1 Basic Concepts
  • 9.1.1 Phase Detector
• 9.2 Type-I PLLs
  • 9.2.1 Alignment of a VCO’s Phase
  • 9.2.2 Simple PLL
  • 9.2.3 Analysis of Simple PLL
  • 9.2.4 Loop Dynamics
  • 9.2.5 Frequency Multiplication
  • 9.2.6 Drawbacks of Simple PLL
• 9.3 Type-II PLLs
  • 9.3.1 Phase/Frequency Detectors
  • 9.3.2 Charge Pumps
  • 9.3.3 Charge-Pump PLLs
  • 9.3.4 Transient Response
  • 9.3.5 Limitations of Continuous-Time Approximation
  • 9.3.6 Frequency-Multiplying CPPLL
  • 9.3.7 Higher-Order Loops
• 9.4 PFD/CP Nonidealities
  • 9.4.1 Up and Down Skew and Width Mismatch
  • 9.4.2 Voltage Compliance
  • 9.4.3 Charge Injection and Clock Feedthrough
  • 9.4.4 Random Mismatch between Up and Down Currents
  • 9.4.5 Channel-Length Modulation
  • 9.4.6 Circuit Techniques
• 9.5 Phase Noise in PLLs
  • 9.5.1 VCO Phase Noise
  • 9.5.2 Reference Phase Noise
• 9.6 Loop Bandwidth
• 9.7 Design Procedure
• 9.8 Appendix I: Phase Margin of Type-II PLLs
• References
• Problems

CHAPTER 10: INTEGER-N FREQUENCY SYNTHESIZERS

• 10.1 General Considerations
• 10.2 Basic Integer-N Synthesizer
• 10.3 Settling Behavior
• 10.4 Spur Reduction Techniques
• 10.5 PLL-Based Modulation
  • 10.5.1 In-Loop Modulation
  • 10.5.2 Modulation by Offset PLLs
• 10.6 Divider Design
  • 10.6.1 Pulse Swallow Divider
  • 10.6.2 Dual-Modulus Dividers
  • 10.6.3 Choice of Prescaler Modulus
  • 10.6.4 Divider Logic Styles
  • 10.6.5 Miller Divider
  • 10.6.6 Injection-Locked Dividers
  • 10.6.7 Divider Delay and Phase Noise
• References
• Problems

CHAPTER 11: FRACTIONAL-N SYNTHESIZERS

• 11.1 Basic Concepts
• 11.2 Randomization and Noise Shaping
  • 11.2.1 Modulus Randomization
  • 11.2.2 Basic Noise Shaping
  • 11.2.3 Higher-Order Noise Shaping
  • 11.2.4 Problem of Out-of-Band Noise
  • 11.2.5 Effect of Charge Pump Mismatch
• 11.3 Quantization Noise Reduction Techniques
  • 11.3.1 DAC Feedforward
  • 11.3.2 Fractional Divider
  • 11.3.3 Reference Doubling
  • 11.3.4 Multiphase Frequency Division
• 11.4 Appendix I: Spectrum of Quantization Noise
• References
• Problems

CHAPTER 12: POWER AMPLIFIERS

• 12.1 General Considerations
  • 12.1.1 Effect of High Currents
  • 12.1.2 Efficiency
  • 12.1.3 Linearity
  • 12.1.4 Single-Ended and Differential PAs
• 12.2 Classification of Power Amplifiers
  • 12.2.1 Class A Power Amplifiers
  • 12.2.2 Class B Power Amplifiers
  • 12.2.3 Class C Power Amplifiers
• 12.3 High-Efficiency Power Amplifiers
  • 12.3.1 Class A Stage with Harmonic Enhancement
  • 12.3.2 Class E Stage
  • 12.3.3 Class F Power Amplifiers
• 12.4 Cascode Output Stages
• 12.5 Large-Signal Impedance Matching
• 12.6 Basic Linearization Techniques
  • 12.6.1 Feedforward
  • 12.6.2 Cartesian Feedback
  • 12.6.3 Predistortion
  • 12.6.4 Envelope Feedback
• 12.7 Polar Modulation
  • 12.7.1 Basic Idea
  • 12.7.2 Polar Modulation Issues
  • 12.7.3 Improved Polar Modulation
• 12.8 Outphasing
  • 12.8.1 Basic Idea
  • 12.8.2 Outphasing Issues
• 12.9 Doherty Power Amplifier
• 12.10 Design Examples
  • 12.10.1 Cascode PA Examples
  • 12.10.2 Positive-Feedback PAs
  • 12.10.3 PAs with Power Combining
  • 12.10.4 Polar Modulation PAs
  • 12.10.5 Outphasing PA Example
• References
• Problems

CHAPTER 13: TRANSCEIVER DESIGN EXAMPLE

• 13.1 System-Level Considerations
  • 13.1.1 Receiver
  • 13.1.2 Transmitter
  • 13.1.3 Frequency Synthesizer
  • 13.1.4 Frequency Planning
• 13.2 Receiver Design
  • 13.2.1 LNA Design
  • 13.2.2 Mixer Design
  • 13.2.3 AGC
• 13.3 TX Design
  • 13.3.1 PA Design
  • 13.3.2 Upconverter
• 13.4 Synthesizer Design
  • 13.4.1 VCO Design
  • 13.4.2 Divider Design
  • 13.4.3 Loop Design
• References
• Problems

INDEX

• Index